Difference between revisions of "Duovero Multiplexes"
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To assist in figuring out which pins on the Parlor board can be assigned to which duties, here's a table of functions. Mode 7 is "safe_mode" where the pin is effectively disconnected from any functionality. It's set to high impedance (Z) and is left out of the table. The bolded functions are those set by the current U-Boot duovero_mux_data.h. This file sets other parameters (eg: output only, disable pullup/pulldown, etc) and you must refer to the U-Boot file to know what the full state is. A partial indication of the state (wake mode) is indicated in the table by arrows (bidirectional, output, pullup, pulldown). | To assist in figuring out which pins on the Parlor board can be assigned to which duties, here's a table of functions. Mode 7 is "safe_mode" where the pin is effectively disconnected from any functionality. It's set to high impedance (Z) and is left out of the table. The bolded functions are those set by the current U-Boot duovero_mux_data.h. This file sets other parameters (eg: output only, disable pullup/pulldown, etc) and you must refer to the U-Boot file to know what the full state is. A partial indication of the state (wake mode) is indicated in the table by arrows (bidirectional, output, pullup, pulldown). | ||
| − | Underneath the gpio entries are the GPIO register and bit offset. These numbers are useful for device tree purposes. | + | Underneath the gpio entries are the GPIO register and bit offset. These numbers are useful for device tree purposes and are calculated simply as: <tt>register = int(gpionumber / 32) + 1</tt> and <tt>offset = gpionumber % 32</tt>. |
| + | |||
{| class="wikitable" | {| class="wikitable" | ||
Revision as of 04:51, 26 September 2014
This wiki entry concentrates on the Duovero Parlor board and the Multiplexes available from the 40 pin connector.
The ground pin is nearest the console connector port and the power pins are nearest the centre of the board. This is as of writing but it is highly recommended that you check before connecting! Use a voltmeter to check the 3.3V, 5V and 1.8V pins to familiarise yourself with the layout.
There are also two connections on the Parlor board:
OMAP Pin GPIO # Purpose AG24 GPIO121 user push button AH24 GPIO122 user LED
You should start your journey here.
The primary reference for multiplexes and pin functions is the Texas Instruments OMAP4 technical reference manual. The short version of that 6000 page manual is the OMAP4430 datasheet which is easier to search. The primary source reference is in the Uboot code, specifically duovero_mux_data.h which uses the defines from ./arch/arm/include/asm/arch-omap4/mux_omap4.h.
Software Muxing
A helpful post from Phil Lutz describes how multiplexing can be explored without kernel recompilation. The default multiplex for the user LED may not be set to GPIO in Uboot. It certainly is not set to GPIO by the OMAP itself. You can look at the OMAP datasheet on page 48 you can see that the official name for GPIO 122 pin is "abe_dmic_din3" (Mode 0 names are accepted pin names).
This information can also be found by searching for "gpio_122" in the board pinmuxing configuration stored in sysfs: /sys/kernel/debug/omap_mux/board/core. Every pin which can be configured as gpio has a hint about that.
So now just check which is the current pinmuxing configuration for this pin by:
$ cat /sys/kernel/debug/omap_mux/abe_dmic_din3 name: abe_dmic_din3.abe_dmic_din3 (0x4a100116/0x116 = 0x0100), b ah24, t NA mode: OMAP_PIN_INPUT | OMAP_MUX_MODE0 signals: abe_dmic_din3 | slimbus2_data | abe_dmic_clk2 | gpio_122 | NA | dmtimer9_pwm_evt | NA | safe_mode
As the output suggests, the pin is configured in MODE0, this is 'abe_dmic_din3'. The other modes are listed in order as they appear in the OMAP data manual. gpio_122 is multiplex MODE 3. You can set it with:
$ echo 3 > /sys/kernel/debug/omap_mux/abe_dmic_din3
Now you can turn on and off the LED using the usual gpio configuration in /sys/class/gpio/ (google it!). Note that "echo 3" does more than set Mode 3. The number is a selection of bits that set various states for the pin. A quick summary is:
Bit 0,1,2 Set the mode Bit 3 0 = pull up/down disabled , 1 = enabled Bit 4 0 = pull down, 1 = pull up Bit 8 0 = Output only. 1 = input enable (bidirectional)
There are more but these are for sleep modes and wakeup. The manual has details. The defines in mux_omap4.h are useful for interpreting the duovero_mux_data.h file:
IEN 1 << 8 Input enable (bidirectional) IDIS 0 << 8 Output only PTU 3 << 3 Enable Pullup PTD 1 << 3 Enable Pulldown EN 1 << 3 PU/PD enable DIS 0 << 3 PU/PD disable
Parlor pin mux table
To assist in figuring out which pins on the Parlor board can be assigned to which duties, here's a table of functions. Mode 7 is "safe_mode" where the pin is effectively disconnected from any functionality. It's set to high impedance (Z) and is left out of the table. The bolded functions are those set by the current U-Boot duovero_mux_data.h. This file sets other parameters (eg: output only, disable pullup/pulldown, etc) and you must refer to the U-Boot file to know what the full state is. A partial indication of the state (wake mode) is indicated in the table by arrows (bidirectional, output, pullup, pulldown).
Underneath the gpio entries are the GPIO register and bit offset. These numbers are useful for device tree purposes and are calculated simply as: register = int(gpionumber / 32) + 1 and offset = gpionumber % 32.
| Connector Description | OMAP Pin | Reset state | Mode 0 | Mode 1 | Mode 2 | Mode 3 | Mode 4 | Mode 5 | Mode 6 |
|---|---|---|---|---|---|---|---|---|---|
| User LEDa | AH24 | M7, Pulldown | abe_dmic_din3 ⇔ | slimbus2_data | abe_dmic_clk2 | gpio_122 GPIO4[26] |
- | dmtimer9_pwm_evt | - |
| Buttona | AG24 | M7, Pulldown | abe_dmic_din2 ⇔ | slimbus2_clock | abe_mcasp_axr | gpio_121 GPIO4[25] |
- | dmtimer11_pwm_evt | - |
| 04: MCSPI1_CS0 | AE23 | M7, Pulldown | mcspi1_cs0 ⇔↓ | - | - | gpio_137 GPIO5[9] |
- | - | - |
| 06: MCSPI1_CS1 | AF23 | M7, Pulldown | mcspi1_cs1 ⇔↓ | uart1_rx | - | gpio_138 GPIO5[10] |
- | - | - |
| 08: MCSPI1_CS2 | AG23 | M7, Pullup | mcspi1_cs2 | uart1_cts | slimbus2_clock | gpio_139 GPIO5[11] |
- | - | - |
| 10: MCSPI1_CS3 | AH23 | M7, Pullup | mcspi1_cs3 | uart1_rts | slimbus2_data | gpio_140 GPIO5[12] |
- | - | - |
| 03: MCSPI1_CLK | AF22 | M7, Pulldown | mcspi1_clk ⇔ | - | - | gpio_134 GPIO5[6] |
- | - | - |
| 05: MCSPI1_SIMO | AG22 | M7, Pulldown | mcspi1_simo ⇔ | - | - | gpio_136 GPIO5[8] |
- | - | - |
| 07: MCSPI1_SOMI | AE22 | M7, Pulldown | mcspi1_somi ⇔ | - | - | gpio_135 GPIO5[7] |
- | - | - |
| 09: HDQ_SIOb | AA27 | M7, Z | hdq_sio ⇒ | i2c3_sccb | i2c2_sccb | gpio_127 GPIO4[31] |
- | - | - |
| 12: I2C2_SCLc | C26 | M7, Pullup | i2c2_scl ⇔↑ | uart1_rx | - | gpio_128 GPIO5[0] |
- | - | - |
| 14: I2C2_SDAc | D26 | M7, Pullup | i2c2_sda ⇔↑ | uart1_tx | - | gpio_129 GPIO5[1] |
- | - | - |
| 11: SDMMC3_CMD | AG10 | M7, Pullup | usbb2_ulpitll_dat6 | usbb2_ulpiphy_dat6 | sdmmc3_cmd | gpio_167 ⇔↑ GPIO6[7] |
mcspi3_simo | dispc2_data12 | rfbi_data12 |
| 13: SDMMC3_CLK | AE9 | M7, Pullup | usbb2_ulpitll_dat7 | usbb2_ulpiphy_dat7 | sdmmc3_clk | gpio_168 ⇔↑ GPIO6[8] |
mcspi3_clk | dispc2_data11 | rfbi_data11 |
| 15: UART2_TX | AA26 | M7, Pullup | uart2_tx ⇒ | sdmmc3_dat1 | - | gpio_126 GPIO4[30] |
- | - | - |
| 17: UART2_RX | AA25 | M7, Pullup | uart2_rx ⇔↑ | sdmmc3_dat0 | - | gpio_125 GPIO4[29] |
- | - | - |
| 19: BSP2_CLKX | AD27 | M7, Pulldown | abe_mcbsp2_clkx ⇔ | mcspi2_clk | abe_mcasp_ahclkx | gpio_110 GPIO4[14] |
usbb2_mm_rxdm | - | - |
| 20: BSP2_FSX | AC28 | M7, Pulldown | abe_mcbsp2_fsx ⇔ | mcspi2_cs0 | abe_mcasp_afsx | gpio_113 GPIO4[17] |
usbb2_mm_txen | - | - |
| 21: BSP2_DX | AD25 | M7, Pulldown | abe_mcbsp2_dx ⇒ | mcspi2_simo | abe_mcasp_amute | gpio_112 GPIO4[16] |
usbb2_mm_rxrcv | - | - |
| 22: BSP2_DR | AD26 | M7, Pulldown | abe_mcbsp2_dr ⇔ | mcspi2_somi | abe_mcasp_axr | gpio_111 GPIO4[15] |
usbb2_mm_rxdp | - | - |
| 23: BSP_CLKS | AH26 | M7, Pulldown | abe_clks ⇔↓ | - | - | gpio_118 GPIO4[22] |
- | - | - |
| 25: MCSPI4_SOMI | AF21 | M7, Pullup | mcspi4_somi ⇔ | sdmmc4_dat0 | kpd_row6 | gpio_153 GPIO5[25] |
- | - | - |
| 27: MCSPI4_SIMO | AF20 | M7, Pullup | mcspi4_simo ⇔ | sdmmc4_cmd | kpd_col7 | gpio_152 GPIO5[24] |
- | - | - |
| 29: MCSPI4_CLK | AE21 | M7, Pulldown | mcspi4_clk ⇔ | sdmmc4_clk | kpd_col6 | gpio_151 GPIO5[23] |
- | - | - |
| 31: MCSPI4_CS0 | AE20 | M7, Pullup | mcspi4_cs0 ⇔↓ | sdmmc4_dat3 | kpd_row7 | gpio_154 GPIO5[26] |
- | - | - |
Notes
a) Assigned as such in u-boot but reassigned in the kernel board startup code to Mode 3 Outputs
b) There is a 10K pull up to 1.8V, internal to the DuoVero COM, on the HDQ_SIO line. Do not enable a pull down on this line. This will result in a non-logic output level (approximately 1V). This is currently considered to be a bug and may be removed in future COM revisions.
c) There are pullups on I2C2 and I2C3 of approximately 1K. S/C current is over 2mA.
