Difference between revisions of "USB"
| Line 16: | Line 16: | ||
| − | The [[24pin_connector|24-pin flex ribbon]] connector has USB port 1 on it. USB port 2 is on the [[60pin_connector|60-pin Hirose connector]] | + | The [[24pin_connector|24-pin flex ribbon]] connector has '''USB port 1''' on it. '''USB port 2''' is on the [[60pin_connector|60-pin Hirose connector]] |
The pinouts you need for USB port 1 are: | The pinouts you need for USB port 1 are: | ||
| Line 42: | Line 42: | ||
C1,C2: 0.1uF | C1,C2: 0.1uF | ||
| − | (read warning above) | + | (*read warning above) |
== Related == | == Related == | ||
| + | |||
| + | [http://pubs.gumstix.com/documents/PXA%20Documentation/PXA270/PXA270%20Design%20Guide%20%5b280001-002%5d.pdf PXA270 Design Guide, P. 202] | ||
[http://www.usb.org/developers/docs/usb_20_092407.zip Universal Serial Bus Revision 2.0 specification] | [http://www.usb.org/developers/docs/usb_20_092407.zip Universal Serial Bus Revision 2.0 specification] | ||
[ftp://ftp.compaq.com/pub/supportinformation/papers/hcir1_0a.pdf Open HCI—Open Host controller Specification for USB] | [ftp://ftp.compaq.com/pub/supportinformation/papers/hcir1_0a.pdf Open HCI—Open Host controller Specification for USB] | ||
| + | |||
| + | [http://www.fairchildsemi.com/an/AN/AN-5052.pdf Implementing the Physical Layer in a USB 2.0 Compliant System, AN-5052, Fairchild Semiconductor] | ||
Revision as of 14:01, 4 April 2008
| USBH_PWR1 | Pull-up to 3.3 volts to enable USB port | |
| USBH_PEN1 | ||
| USBH_P1 | USB port | USB D+ |
| USBH_N1 | USB D- | |
| V_BATT | USB VBUS | |
| GND | USB DGND | |
The 24-pin flex ribbon connector has USB port 1 on it. USB port 2 is on the 60-pin Hirose connector
The pinouts you need for USB port 1 are:
- V_BATT (pin 24) - USB power
- USBH_N1 (pin 18) - USB D-
- USBH_P1 (pin 17) - USB D+
- GND (pin 8) - USB Ground
In addition, you need to pull USBH_PWR1 (pin 20) up to 3.3 volts to enable the port. You need to provide a stable 3.3 volt supply, which is fairly simple to do by adding a small SOT23 package voltage regulator (like the LM3480), with the power input coming from V_BATT (pin 24) and the output going to USBH_PWR1 (pin 20).
WARNING: This information could be yet inaccurate. TODO: D+/D- pull-down resistors (software?), termination resistors and capacitors for EMI suppresion, plus USBH_PEN1 and USBH_PWR1
Examples
U1: LM3480
C1,C2: 0.1uF
(*read warning above)
Related
Universal Serial Bus Revision 2.0 specification
Open HCI—Open Host controller Specification for USB
Implementing the Physical Layer in a USB 2.0 Compliant System, AN-5052, Fairchild Semiconductor
.
